From Python to silicon
 

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projects:sidebar [2012/06/13 11:57]
jandecaluwe
projects:sidebar [2012/06/13 11:58] (current)
jandecaluwe
Line 7: Line 7:
       * [[projects:UART/RS232 Receiver Transmitter]]       * [[projects:UART/RS232 Receiver Transmitter]]
       * [[projects:Python Hardware Processor]]       * [[projects:Python Hardware Processor]]
 +
   * Thomas Traber   * Thomas Traber
       * [[projects:mixedmodesimulation]]       * [[projects:mixedmodesimulation]]
Line 13: Line 14:
       * [[projects:cosimulation_with_quartus]]       * [[projects:cosimulation_with_quartus]]
       * [[projects:interactive_simulation_using_ipython]]       * [[projects:interactive_simulation_using_ipython]]
 +
   * Christopher L. Felton   * Christopher L. Felton
       * [[projects:gcicexample]]       * [[projects:gcicexample]]
Line 18: Line 20:
       * [[users:cfelton:projects:fxintbv]]       * [[users:cfelton:projects:fxintbv]]
       * [[users:cfelton:projects:usbp]]       * [[users:cfelton:projects:usbp]]
 +
   * Guenter Dannoritzer   * Guenter Dannoritzer
       * [[projects:conste_encoder|Constellation Encoder]]       * [[projects:conste_encoder|Constellation Encoder]]
Line 27: Line 30:
  
   * Jan Decaluwe   * Jan Decaluwe
-       * [[http://www.jandecaluwe.com/hdldesign/digmac.html|MyHDL-based design of a digital macro]]+      * [[http://www.jandecaluwe.com/hdldesign/digmac.html|MyHDL-based design of a digital macro]]
  
   * George Pantazopoulos    * George Pantazopoulos 
projects/sidebar.txt ยท Last modified: 2012/06/13 11:58 by jandecaluwe
 
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