From Python to silicon
 

Welcome to MyHDL

MyHDL - From Python to Silicon!

Welcome to the MyHDL website. MyHDL is an open source Python package that lets you go from Python to silicon. With MyHDL, you can use Python as a hardware description and verification language. Furthermore, you can convert MyHDL code, that was developed towards implementation, to Verilog and VHDL automatically, and take it to a silicon implementation from there.

On this website, you will find everything you need to get started - and to keep going - with MyHDL. Have fun!



20-May-2013 MyHDL 0.8 released!

24-Apr-2013 Follow @MyHDL on Twitter!

News archive >>


start.txt · Last modified: 2013/05/20 19:47 by jandecaluwe
 
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