From Python to silicon
 

USB FPGA Design

This page outlines the design of the FPGA logic.

The colors indicate which blocks have been complete or there status.

  • Green block is complete
  • Orange block is in development
  • Red block not started
users/cfelton/projects/usb_hdl.txt · Last modified: 2009/08/19 10:54 by cfelton
 
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