From Python to silicon
 

MyHDL implementation of the ZPU processor

Use at your own risk this project is incomplete and for all practical purposes abandoned

This project is a MyHDL and Python implementation of the ZPU processor. The ZPU processor is a small (very small) stack processor with a Gnu toolchain. It is ideal for embedded processor in FPGAs if one is needed.

This project was started basically for fun but seemed like a good opportunity to unite the ISS simulator and HDL in a single language. The ZPU existing implementation the ISS simulator is written in java and the HDL in verilog. This project unites them to the Python language.

ISS
HDL
users/cfelton/projects/zpu.txt · Last modified: 2014/02/20 11:59 by cfelton
 
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